Forum Discussion
Altera_Forum
Honored Contributor
13 years agoYou can use the timing advisor (Tools menu > Advisors > Timing Optimization Advisor) to check your project settings for options to change to have a better timing.
But those options are usually limited. If you still have problems after that then you will probably have to look at the VHDL code and try to make it more speed friendly (by adding pipeline stages for example). Here again the "Worst-Case Timing Paths" part of the Timequest report will help you find what you need to optimize.