Stratix II - Asynchronous RAM Memory

No. Note that asynchronous RAM are almost never necessary. For example, the addressing is eventually being fed by a register, so it's just a matter of absorbing that into the RAM. Quartus Integrated Synthesis can do a pretty good job of that. But looking at a common example:

Designer has a counter that is used to drive the address of a register. Because the counter is a feedback structure(it's input for next state is dependent on its output of current state), those registers seemingly can't get absorbed into the synchronous memory. But you can just code it where the synchronous memory gets the same logic as the counter's feedback, i.e.:

counter <= counter + 1;

address <= counter + 1;

So now the address can be absorbed into the memory, since it has the same value as the counter at all times, but it does not have a feedback loop on itself.