Stratix-3 to Pic18F4550

For the FPGA-to-PIC signals, 3.3V -> 5V does not need any level translators.

You'll need to make sure that you do not enable any pull-up on the PIC input, as that would pull-up to 5V. When your FPGA is not configured those pull-ups can forward bias the FPGA I/O diodes.

You can always play it safe and add some series resistance between your FPGA and PIC signals. That way if the PIC comes on with 5V levels on its I/Os, and the FPGA is still configuring, you'll limit the current to safe levels.

If you have any PIC signals going back to the FPGA, then you need to take care not to violate the input voltage maximum of the FPGA I/Os. If you're only doing this on a couple of signals, you can use a voltage divider.

Cheers,

Dave