Forum Discussion
Hi ! Thanks.
In your last answer you wrote: You need to enable export MSI interface to implement custom MSI interrupt handle and send the MSI interrupt via TXS interface.....
I selected the option in platform designer – Export MSI/MSI-X conduit interface and after then, interface added to the top level of the project:
.intx_req_i (), // input, width = 1, intx_intfc.intx_req
.msi_intfc_o(), // output, width = 82, msi_intfc.msi_intfc
.msi_control_o(), // output, width = 16, msi_control.msi_control
.msix_intfc_o (), // output, width = 16, msix_intfc.msix_intfc
When trigger interrupt using input .intx_req_i (), OS (operating system) register legacy interrupt.
how this interface can help generate MSI interrupt ?
Can you give an example for your recommendations ? about which you wrote:
- ……….you need to create a MSI (Memory Write) Transaction,
- and transmit it through the TXS interface based on the information that you obtain from the MSI conduit interface,
Regards
Hi,
To enable/generate MSI Interrupt. You can refer the link provided in the previous reply.
https://community.intel.com/t5/FPGA-Wiki/Handling-PCIe-Interrupts/ta-p/736044
If you have any doubt, you may refer to the design example , MSI Design Example for Stratix V
It might not exactly the same as Stratix 10. But you can refer to it as a case study.
Hope this is able to help.
Regards,
Wincent_Intel