Strange Large IC delay in CycloneV

--- Quote Start ---

And you said "is clock pessimism removal enabled", what does this mean? can clock pessimism removal be disabled?from where in Quartus?

Thanks a lot.

ingdxdy

--- Quote End ---

clock pessimism removal should be enabled by default, go to quartus/settings/timing analysis settings and see clock pessimism removal box is checked.

It means for common clock path (that initial part shared between launch and latch clocks) the max/min difference effect should be ignored as physically you should either have max or min but not both on same physical line at anytime. If allowed it adds false unrealistic figure to setup slack and subtracts from hold slack.

Your clock pessimism of 1.3 ns is also too high!