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Altera_Forum
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10 years ago

Strange Large IC delay in CycloneV

Hi, community, I am using 5CGTFD5C5F27C7 in my project to receive synchronous data from a 12-bit ADC. the data rate is 480Mbps, for i need to use dynamic io delay to compensate for the fixed del...
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Altera_Forum
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10 years ago

your waveform shows launch clock delay of 5.589 ns while latch clock delay is 3.391 + 1.339 (ns).

This may give a clue to the negative setup slack. Why launch clock is so delayed?