Altera_Forum
Honored Contributor
16 years agostrang things about FSM
in my design i use FSM,and i don't know why my FSM alway be in a undefined status, see the picture below, and I have use "default" : default:begin ............ end
I found when irq_i is low,then state machine go to 00000h.see picture nether:
another question:does "if...else if.....else "have priority level? code: SPI_IDLE_status: begin TXBnCTRL_whetherCanTxNext <= 1'b1; rxdFIFOHaveFrameIrq <= 1'b1; SPI_other_CANINTF_irq_reg <= 1'b1; if(!irq_i) begin spiStatusMachineReg <=SPI_CANINTF1; TXBnCTRL_whetherCanTxNext <= 1'b0; end else if(transmitFIFOUsedw>>`wholeFrameLength begin TXBnCTRL_whetherCanTxNext <= 1'b0; txd_FIFO_num_reg <= 15; spiStatusMachineReg <=SPI_SEND_status; end else spiStatusMachineReg <=SPI_IDLE_status; end