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TChin5's avatar
TChin5
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7 years ago

Still cannot assign LVDS signal to MAX-V device

I try your suggestion. I have a single-ended signal call OUT_P and assigned it as LVDS_E_3R, the pin planner created the corresponding diff signal call OUT_P(P). When I compile it, Quartus returns a...
TChin5's avatar
TChin5
Icon for New Contributor rankNew Contributor
7 years ago

But I never use the ALTLVDS_TX IP in my design. I only have it there because my LVDS signal was causing compile issue and was trying out this part, it didn't help and I have commented them out as seen at the bottom of my file. I try this design in using V18.1 lite and it didn't work.

Attached is the 18.1 archive.

I un-archive your design and it compile but What did you do to the designed to get it to work