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TChin5's avatar
TChin5
Icon for New Contributor rankNew Contributor
7 years ago

Still cannot assign LVDS signal to MAX-V device

I try your suggestion. I have a single-ended signal call OUT_P and assigned it as LVDS_E_3R, the pin planner created the corresponding diff signal call OUT_P(P). When I compile it, Quartus returns a...
Abe's avatar
Abe
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

I've looked into the project and resolved the LVDS issue. I've deleted the ALTLVDS_TX IP as it is not needed, but haven't removed the other IP components. If you are not using these, please do remove them.

Another point to be noted is that I've used v18.0 lite and created this QAR file, so I would suggest you open this file with v18.1 and upgrade the IP components. Then do a PRoject Clean and then Compile. It should work this time. The LVDS assignments are OUT_P(p) -> PIN_D15 and OUT_P(n) gets assigned to PIN_C14. It compiles fine without the errors.