Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Static power consumed by an ALM?

I'm a student researching FPGA related issues.

Since an ALM could combine functions into one ALM, the static power it takes might varied from different combinations.

The question is, does the static power of an ALM really varied as I thought?

i.e.

Static power of ALM A which implements a 4-input function is not equal to Static power of ALM B which implements a 6-input function,

or

Static power of ALM C which implements two 4-input functions is not equal to Static power of ALM D which implements one 4-input function and one 3-input function.

It seems that no detail data or document about this question.

If the issue I concerned does varied, where could I get such details?

Thanks for replying.

Best Regards,

Student Tien-Yu Kuo

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Thanks for replying.

    I will try to use Quartus II and EPE.

    Besides,

    why you think that the static power will not varied?

    Best Regards,

    Student Tien-Yu Kuo
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    i really should turn it around to you and say why do you think static power will vary?

    i'm sure this is a high level statement, but here's a quote from Altera documentation:

    "Static power is the power consumed regardless of design activity."
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Static power consumption of the FPGA core is mainly caused by the leakage currents involved with nm CMOS technologies. I don't see a reason why loading different configurations into the core ALMs should cause other than very small erratical differences in leakage currents.

    The situation is probably different for I/O cells, that can be expected to have a quiescent current, e.g. differntial input amplifiers and true LVDS current sources.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Oh...I see...

    Thank "thepancake" and "FvM" for replying.

    My misunderstanding is that, under different configurations, some transistors may always not be activated (like an ALM only implements a 4-input function). So that it become power gated status (or something like that).

    But I still have a question.

    Does it mean that no matter how many ALMs used (or configured), the static power of using such device is the same?

    That is, the device will always take the same static power no matter how many ALMs the design needs?

    i.e.

    The static power of design A containing 10 ALMs is equal to the static power of design B containing 50 ALMs.

    Assume that all other situations or conditions are the same. (Like# IO, etc.)

    Best Regards,

    Student Tien-Yu Kuo