Forum Discussion
New ContributorStarbleed on Intel FPGA possible?
Hi,
My name is Hazlina and I am the senior manager of the applications engineering team supporting this forums. I appreciate your question, but unfortunately we are not in liberty to discuss on our FPGA chip-level/architecture implementation w.r.t. to security feature especially in comparison to our competitor products.
We are happy to address if you have any implementation challenges that we can help you with. Let us know if you have any?
Otherwise, below is the collateral that explained on the high level on our most advance security feature available with Stratix 10:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/wp/wp-01252-secure-device-manager-for-fpga-soc-security.pdf
Thanks.
ContributorHi,
My name is Hazlina and I am the senior manager of the applications engineering team supporting this forums. I appreciate your question, but unfortunately we are not in liberty to discuss on our FPGA chip-level/architecture implementation w.r.t. to security feature especially in comparison to our competitor products.
We are happy to address if you have any implementation challenges that we can help you with. Let us know if you have any?
Otherwise, below is the collateral that explained on the high level on our most advance security feature available with Stratix 10:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/wp/wp-01252-secure-device-manager-for-fpga-soc-security.pdf
Thanks.
