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Altera_Forum
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15 years ago

SRAM model Generation

Hello I have a NIOSII system as follow : EPCS controller CPU - tristate-Bridge - sram_ctrl_v00 + some other bits my SRAM is external to the FPGA. So I have created a controller sra...
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Altera_Forum
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14 years ago

Hi ben,

I also need to integrate a custom memory in my prjoject. But I don't have idea how the memory controller should look like. I already implemented the model and testbench for Cypress 1024x8 Bit memory.

Can you please share me a piece of code to get an overview ?

Regards