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Altera_Forum
Honored Contributor
12 years agosorter in vhdl
hi every one
i want avhdl code to sort integer input ascending if i have an array such as 1,8,9,7,2 the out put will be such as 1,2,7,8,9 i search a lot but didn't find any code that helping me thanks .40 Replies
- Altera_Forum
Honored Contributor
ok ,kaz
i want to sort duration ascending such as 8,9,16,32,48 and the code will e 20,40,10,40,50 how i can do it ?? plz help me if you can i will be very thankful to you thanks - Altera_Forum
Honored Contributor
--- Quote Start --- ok ,kaz i want to sort duration ascending such as 8,9,16,32,48 and the code will e 20,40,10,40,50 how i can do it ?? plz help me if you can i will be very thankful to you thanks --- Quote End --- you already done that. you write the values 20~50 at addresses 8,9,16,32,50 once done then you run address cycle from 0 downto 1023 and get output ram contents which are write flagged then you will get them coming out sorted since for example location order will be ascending as 8,9,16,32,48 - Altera_Forum
Honored Contributor
to avoid confusion you can use bit(8) as flag !!
how i can do that ?? because i am really confused !! - Altera_Forum
Honored Contributor
--- Quote Start --- to avoid confusion you can use bit(8) as flag !! how i can do that ?? because i am really confused !! --- Quote End --- you might as well not use flag at all if your code is never all zeros. Then your problem reduces to just write/read write stage: write code per duration as address then once done go to read stage read stage: use address range either from 0 to 1023 and discard any location that contains zero (or just your known duration values and get code directly ) - Altera_Forum
Honored Contributor
Two points:
- I can't identify a valid bubblesort algorithm which would imply exchanging RAM entries. - The real challenge is to implement the sort algorithm in FPGA block RAM, being aware of the requirements for RAM inference. - Altera_Forum
Honored Contributor
kaz,be patient to make me understand the code
you consider in the code that addresses(duration) is a continuous values ,ok if there is not a value in the successive address it put a zero in content of ram (corresponding to this empty address) its wright or not?? but the reverse happens i.e i have a discrete values. and i have a question to you if i want to separate the codes and the addresses that output ascending i.e the codes ordered in output and the corresponding in another output because i will use the codes that ordered to count the distances that we done before i hope you understand me well - Altera_Forum
Honored Contributor
--- Quote Start --- Two points: - I can't identify a valid bubblesort algorithm which would imply exchanging RAM entries. - The real challenge is to implement the sort algorithm in FPGA block RAM, being aware of the requirements for RAM inference. --- Quote End --- we are not exchanging ram entries but want to sort som data in ascending order to output. If the post wants to rearrange in second ram then this could be done. by reading ram1 into a second ram. - Altera_Forum
Honored Contributor
--- Quote Start --- if there is not a value in the successive address it put a zero in content of ram (corresponding to this empty address) its wright or not?? --- Quote End --- you don't write so content stays zero --- Quote Start --- but the reverse happens i.e i have a discrete values. and i have a question to you if i want to separate the codes and the addresses that output ascending i.e the codes ordered in output and the corresponding in another output because i will use the codes that ordered to count the distances that we done before i hope you understand me well --- Quote End --- If I understood you. You are saying same duration(address) for two codes? in that case you need to tackle the problem. one way is to have wider ram and check address is written to before then put new data at same location next to previous data and flag it as two or three and so on. Or you can check in your logic and change address accordingly. You will need to work out details of your case and my above algorithm is just a guide. - Altera_Forum
Honored Contributor
no kaz, you didn't under stand me well
every address (duration) has its unique code put all i want to separate the content of the ram ordered i.e i want to get the code ordered in a separate output from addressees ordered because i will use the ordered codes only - Altera_Forum
Honored Contributor
--- Quote Start --- no kaz, you didn't under stand me well every address (duration) has its unique code put all i want to separate the content of the ram ordered i.e i want to get the code ordered in a separate output from addressees ordered because i will use the ordered codes only --- Quote End --- that is easier then. imagine your addresses are coming at random: 201, 300,,13,1012 (for associated data: 20,30,40,50) you write to addresses 201(20), 300(30), 13(40), 1012(50) Now you get data ready to be read out starting from address 0 to 1023 and discard any zero data so you will get: addr data 13 => 40 201 => 20 300 => 30 1012 => 50 so your output stream will be: 40,20,30,50 in ascending order of duration(address) Is that what you want?