sorter in vhdl

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no , i will get a large number of data

but, if you may remember i want the sorted trigraphs (codes) to compute the distances between two trigraphs ,do you remember??

so,i want it to be in a single output (independent) not including in the ram content

i hope you understand me

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do you mean like this:(then you need to discard any zero outputs)

library ieee;
use ieee.std_logic_1164.all;
use IEEE.numeric_std.all;
entity bubblesort is
port(
    clk      : in std_logic;
    we       : in std_logic := '1';
    trigraph : in std_logic_vector(7 downto 0) := x"0F";
    duration : in integer range 0 to 1023 := 5;
    read     : in std_logic := '0';
    dout     : out std_logic_vector(7 downto 0)
);
end entity;
architecture rtl of bubblesort is
  
signal address, rd_addr : integer range 0 to 1023 := 0;
type mem is array(0 to 1023) of std_logic_vector(7 downto 0);
signal ram : mem := ((others=> (others=>'0')));
begin
--infer ram
process(clk)
begin
if(rising_edge(clk)) then
   dout <= ram(address);
   if(we = '1') then
      ram(address) <= trigraph;
   end if;
end if;
end process;
process(clk)
begin
if rising_edge(clk) then
  if read = '1' then
    if rd_addr < 1023 then
      rd_addr <= rd_addr + 1;
    end if;
  end if;
  
  if read = '0' then
    address <= duration;
  else
    address <= rd_addr;
  end if;
  
end if;
end process;
end rtl ;