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Altera_Forum's avatar
Altera_Forum
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16 years ago

SOPC PLL - clock switching

I'm using schematic based entry. I have a NIOS design with custom components as part of my SOPC. There is an Altera PLL inside the SOPC. I have the hardware designed such that it will accommodate a backup clock.

When I change the PLL to create the appropriate signals for clock switching, then compile the SOPC, I don not get the extra pins to appear on the block symbol. I've checked the system.h file and see no mention of how to control the line used to swap the clocks.

Is this a bug with SOPC? I have no problems creating a separate PLL and putting it onto a BDF sheet.

Any ideas or hints would be very appreciated.

Bill

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    i don't believe this is supported in sopc builder. i generally suggest instantiating the pll outside of sopc builder in any case. i see no real need to have the cpu access the pll.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    I am grasping at how I proceed to instantiate the pll outside of the design, yet make available to all of the SOPC components the four clocks that the pll creates.

    I've tried creating a custom component for the pll, but all I can do is export the signals or pair them up with the customary avalon interface signals (write, read, addr, data,etc).

    I appreciate any suggestions at this point.