Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Sopc Help

hi again, I'm using a SDRAM controller in SOPC. but things are not working right. Failing paths, buffer of templates are getting full , ... I'm using master write and master read ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

--- Quote Start ---

do i need a diffrent ip.sdc for the sopc? Here is my SDC-File for main design:

--- Quote End ---

Sopc builder should have generated automatically a .sdc file for your system.

You must include it in your Quartus project.

Also make sure your checked the "Timing driven synthesis" in Analysis&Synthesis settings and follow the other guidelines reported by timing optimization advisor.

If all this fails maybe the 144MHz frequency is really too high for your device.

Final note: probably this is not your current problem, but usually you must drive the sdram clock pin with a phase lead relative to clock used by sopc system.