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Honored Contributor
16 years agoI don't know, if you are talking about Quartus or ModelSim functional simulation? At least with ModelSim, uninitialized signals show a value of 'U'. That means, e.g. a frequency dividing counter can't work, unless you initialize it.
In VHDL, setting an initial value with the signal definition is the most simple method, e.g.signal counter : unsigned := (others => '0'); Also an explicite reset initialization works of course.