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Altera_Forum
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10 years ago

SoC with DDR3: Fitter refuses to fit HPS_DM_0

I am trying to compile a 5CSEBA2U23I7S with DDR3 using Quartus 14.1 (and 15.1, same problem); all pins are according to the pin-out document for Cyclone V , but the fitter insists in not agreeing wit...
Altera_Forum's avatar
Altera_Forum
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10 years ago

Have you run the pin constraint .tcl for the SDRAM I/O? It will be output to this location: <Qsys system name>\synthesis\submodules\hps_sdram_p0_pin_assignments.tcl If it's successful if you view the Quartus project .qsf file you should see a bunch of new SDRAM constraints added to the end of it.

Are you sure that's the right pin location and that you have the right device selected in Quartus?