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Altera_Forum
Honored Contributor
Honored ContributorSimulation Problem Multiplier 8 bits
Here is the code: Library ieee; use ieee.std_logic_1164.all; use IEEE.std_logic_arith.all; use IEEE.std_logic_unsigned.all; entity Multiplier8 is port (clk : in std_logic; ...
Altera_ForumHonored Contributor
Honored ContributorI don't know how to create a testbench with Altera max plus II. THe image of my desktop is this when i run the simulation.
http://img824.imageshack.us/img824/2255/80310899.jpg (http://imageshack.us/photo/my-images/824/80310899.jpg/) When there is a clock event i get that error-warning.
