Simulating the Parallel Flash Loader

What do you mean with alone? A ModelSim simulation with a flash functional model (I used a Spansion S29GL256N model) is feasible. As said, programming can't be simulated, cause JTAG interface and programmer action aren't easily accessible, but configuration can be fully traced in simulation, you need to model FPGA nStatus and ConfigDone responses in your testbench. And there's no checking for correct configuration data, of course.

I don't think, that the predefined standard PFL designs need to be simulated, but if you are trying to build something special, it may be useful.