Forum Discussion
SyafieqS
Super Contributor
3 years agoHi Rajesh,
Signaltap is bound by the same constraints for the rest of the design - so if you have specified the clock constraints, the Timing analyzer report will list any failed paths into signaltap
If there are no errors here, and you're still getting errors - then is it possible you are sampling the signals with the wrong clock?
Also, SignalTap is just like any other logic in your design and follows the same rules. If you sample signals from other clock domains with the 250MHz clock then you will get timing violations unless you tell TimeQuest to ignore timing on those paths.