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Altera_Forum
Honored Contributor
Honored Contributorsignal tap - question
I certainly have a lot of experience with Xilinx devices and tools, not so much with altera so would certainly appreciate any assistance. I was handed an a altera design, and told to port all my xili...
Altera_ForumHonored Contributor
Honored ContributorExporting the partition is required only if you wanted to import the block into another project, like in the case that you want to optimize in the lower-level and export your placement & routing to the project lead. If you just want to compile your block by itself to simulate, check timing etc, then you don't need to export the project or the partition. So, yes - you can turn off the option to export the design as a partition.
You can keep the block as a design partition if you like (that just keeps a hard hierarchical boundary around it), and you can keep the incremental compilation setting turned on so you can use SignalTap II incrementally. Then when you are happy that your block works, then just give your project lead a copy of your source files for your partition so the block can be implemented in the top-level design. Does that make sense?
