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Altera_Forum's avatar
Altera_Forum
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16 years ago

signal tap - question

I certainly have a lot of experience with Xilinx devices and tools, not so much with altera so would certainly appreciate any assistance. I was handed an a altera design, and told to port all my xili...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

The error message says, that SignalTap can't be used with exported partitions.

The Quartus Software Handbook tells ins this regard:

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You can use the Logic Analyzer Interface in any project that you can compile and program into an Altera device. You cannot export a lower-level project that uses the Logic Analyzer Interface in a bottom-up incremental compilation flow. You must disable the Logic Analyzer Interface feature and recompile the design before you export the design as a partition.

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