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Altera_Forum
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13 years ago

Signal A lag signal B

Hi, I am a newbie to Altera CPLD. I have a signal A and it's compliment signal B. I would want signal B to always lag 1us w.r.t signal A at the rising edge. And signal A lags signal B by...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I think that if these signals are what are required then a simple state machine would do the job. There are four regions. S1 is A high and B low, S2 is A and B high, and S3 is A high and B low. Obviously the "B" signal would be inverted from this for the final output. S0 is idle state. -James