Shift out design within state machine

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The problem is that the bit streams are all different length and I am trying to think of a creative way to output a different length binary stream. Worst case I could make a state machine for every single binary output but this would use a lot of logic elements up. Are there any other methods to shift out binary sequences of varying lengths within a state machine or a case statement?

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Page 45 has an example that may work for you too:

http://www.ovro.caltech.edu/~dwh/carma_board/ad9956_tests.pdf

Cheers,

Dave