Forum Discussion
Altera_Forum
Honored Contributor
8 years agoRysc,
Thanks for the writeup. So, if I add set_clock_groups -asynchronous between clock domains, that cuts the setup/hold analysis between cdc paths, and design the cdc paths correctly, I should be good? I do have multi-bit counters and FSM states, that I am using in another clock domain. For the FSM states, I've added a command to the .qsf to tell the tools to encode FSM states in gray code. The multi-bit counters I run through a bin2gray -> cdc regs -> gray to bin, so I'm wondering if I need to use the set max/min/net/skew on those paths? Will the set_clock_groups -asynchronous take precedence over those max/min/net/skew constraints?