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There may be a problem, that an unconfigured
AS memory device is interfering with JTAG. The Quartus programmer
has an option "Halt on-chip configuration controller" to avoid this situation.
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OK. But when I am configuring FPGA with "factory default" sfl (quartus/common/devinfo/programmer/sfl_ep2c20.sof) everything is ok and I have access to EPCS4 (without checking option "Halt on-chip configuration controller"). I think there is a "stupid" error in my project. But I will try to enable that option.
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As a (really trivial) reason, the sof-file selected in Quartus programmer may be
different from the current compiled design.
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No way ;)
Honored Contributor
