Serdes Ref clk input circuit

Hi,

Yes, Cyclone V receiver buffer does has internal on-chip biasing circuitry but we can't expose the internal circuit design as it's Intel proprietary design info.

However, we do have user guide doc that explained on available feature in receiver buffer. You can checkout chapter "Recevier PMA datapath" (Page 20) in below user guide link

• https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_53004.pdf

Thanks.

Regards,

dlim