Altera_Forum
Honored Contributor
Honored ContributorSERDES in Stratix II
Do all LVDS pins on Stratix II support the serdes option?
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Altera_ForumHonored Contributor
Honored ContributorAs I look at the Stratix II GX pinout file, it seems like bank 9-12 are only for PLL IO which was driven by VCC_PLL*_OUT. I believe this is why there is no VCCIO for these banks.
