Forum Discussion
Altera_Forum
Honored Contributor
13 years agoSelf reset to FPGA
Hi, I'm integrating an independent FPGA which doesn't have a master CPU associated with it. I need to reset the FPGA right after it enters user mode. Will using Init_done signal Anded with Co...
Altera_Forum
Honored Contributor
13 years agoHi,
The user logic in the code.