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Altera_Forum
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13 years ago

SDRAM Controller-Problem

Hi, i build a design in SOPC Builder on Quartus 8.0 (CycloeIII) that looks like this : [CPU]<------->[Half rate bridge]<--------->[SDRAM Controller(not DDR)]. 66MHz ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Try to remove the bridge and let the interconnect to create a hand-shake algorithm to use the SDRAM. I believe 133MHz is just too fast. Try to use 66MHz for the SDRAM chip and 33MHz for the rest of the system before trying that solution I've mentioned before.