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Altera_Forum
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14 years ago

SDR SDRAM controller problem

Hi, I have developed my own SDR SDRAM controller in VHDL to integrate it with the rest of a design inside a Cyclone IV for image processing. By testing the controller I write in the SDRAM 307...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

The FPGA device is EP4CE22E22C7 and supports OCT but it didn't work with the OCT resistance.

Only when I reduce the slew rate to the slowest it works better but not as good as when I use the capacitor.

Regards,

John