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Altera_Forum
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13 years ago

SDR SDRAM controller problem

Hi, I have developed my own SDR SDRAM controller in VHDL to integrate it with the rest of a design inside a Cyclone IV for image processing. By testing the controller I write in the SDRAM 307...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Problem solved, SDRAM controller is now working very good.

There were 2 issues. The first was that I did not apply constraints as you all noticed that. The second issue was concerning the clock signal I lead to the SDRAM. It seems it had ringing or some kind of a noise by causing malfunction to the communication between controller and SDRAM. By placing a small capacitor (15pF) between the clock line and the GND signal all errors disappeared. As you realize hardware is custom too.

Thank you very much for your help and for the time you spent.

Regards,

John