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Altera_Forum
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11 years ago

SDC constraints for DE Boards Audio Codec WM8731

In examples provided by Terasic there are no constraints for chipset WM8731 for playing/recording audio but when expanding examples I see noise on audio signal recorder from LINEIN and played back to...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

This is because you need to relate your inputs and outputs to the main clock not bclk. I can't see the table in the second image - too blurry, can you type out what it is saying? Also please post your main clock rate. There are a few things you need to setup like multicycle constraints and generated clock constraints. Also post how you are creating bclk.