Here's one that I've created. Note that it's a timestamp function as well as a Virtual JTAG Interface(VJI - there's some Altera documentation on this). You don't have to use the VJI at all, and can just rip out the timestamp.v. Note that the .qsf has the line:
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:write_stamp.tcl"
This calls out that .tcl file, which writes out a verilog file with a timestamp in it. (I didn't go the .mif flow, as I thought this was easier. If you had a lot of information you needed to keep, then the .mif flow might be best).
The file it writes out is called timestamp.v and is then called in by Quartus.
The reason I then hooked it up to the VJI interface is that it's a very low-overhead interfae whereby the user can probe the timestamp via Tcl. Look at get_stamp.tcl, which shows how you can open a command prompt, and if you're hooked up to the device's JTAG chain, can then go and get the timestamp to see live what device is on the board. Naturally, if you have your own interface to the FPGA, you probably don't need this and can stick with the simple timestamp.v.