Occasional ContributorAfter power on, FPGA can't load image form flash, the nstatus and nConfig set 1,but CONF_DONE and INIT_DONE set 0 , here is configuration status in SDM tool
Thanks for your help!!!
Regular ContributorHi,
From the error state you provided, the issue might be related to OSC_CLK_1. May I know if you are using external clock to performed configuration? Do you provide the correct clock frequency?
Could you performed Stratix 10 configuration debug check list shown in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/ug-s10-config.pdf Chapter 7.1?
Occasional ContributorHi
Yes,I used external clock with 125Mhz, maybe I should check it. By the way,how can I get the details about States/Error Location/Error Detail parameters ?
Regular ContributorHi,
Currently we are still working on providing more detail error message in the future release.
