Running NIOS code from SSRAM

I made the following changes inside tri_state_bridge_avalon_slave_arbitrator in the NIOS main module. All I did was pipelined the data and write control twice. I had to do this inside the NIOS main module as I was sharing the avalon tri-stare bridge with a FLASH device.

If your SSRAM is not sharing address, data and control pins with any other device (like Flash) you can do the pipeline outside the NIOS main module. I have not tried pipelining the data outside NIOS module, but I guess it should work.

Hope this helps!

   d1_outgoing_tri_state_bridge_data_r <= d1_outgoing_tri_state_bridge_data_r2 when (sram_s1_in_a_write_cycle_r2 = '1') else outgoing_tri_state_bridge_data;
  
  process (clk, reset_n)
  begin
    if reset_n = '0' then
      d1_outgoing_tri_state_bridge_data <= std_logic_vector'("00000000000000000000000000000000");
    elsif clk'event and clk = '1' then
      d1_outgoing_tri_state_bridge_data_r1 <= outgoing_tri_state_bridge_data;
      d1_outgoing_tri_state_bridge_data_r2 <= d1_outgoing_tri_state_bridge_data_r1;
      d1_outgoing_tri_state_bridge_data <= d1_outgoing_tri_state_bridge_data_r;
    end if;
  end process;
  --write cycle delayed by 1, which is an e_register
  d1_in_a_write_cycle_r <= d1_in_a_write_cycle_r2 when (sram_s1_in_a_write_cycle_r2 = '1') else time_to_write;
  
  process (clk, reset_n)
  begin
    if reset_n = '0' then
      d1_in_a_write_cycle <= std_logic'('0');
    elsif clk'event and clk = '1' then
      sram_s1_in_a_write_cycle_r1 <= sram_s1_in_a_write_cycle;
      sram_s1_in_a_write_cycle_r2 <= sram_s1_in_a_write_cycle_r1;
      d1_in_a_write_cycle_r1 <= time_to_write;
      d1_in_a_write_cycle_r2 <= d1_in_a_write_cycle_r1;
      d1_in_a_write_cycle <= d1_in_a_write_cycle_r;
    end if;
  end process;

Kumaran