Running NIOS code from SSRAM

I appologize I don't have time to thoroughly review all of your post. However, what you ought to consider is creating a seperate clock to drive to the SRAM with a phase offset from the clock which is used to clock your logic.

create_generated_clock -name {clk_sopc}     -source     }]                 }] -add
create_generated_clock -name {clk_reconfig} -source     }]  -divide_by 2   }] -add
#  SRAM clock
create_generated_clock -name {sram_clk_int} -source     }] -phase -172.8 }]
create_generated_clock -name {sram_clk}     -source     }] 
#  Input Delays
set_input_delay -clock {clk_sopc} -max 9.7  
set_input_delay -clock {clk_sopc} -min 5.1  
#  Output Delays
set_output_delay -clock  -reference_pin  -max 1.670 
set_output_delay -clock  -reference_pin  -max 1.670 
set_output_delay -clock  -reference_pin  -max 1.670 
set_output_delay -clock  -reference_pin  -max 1.670 
set_output_delay -clock  -reference_pin  -max 1.670 
set_output_delay -clock  -reference_pin  -max 1.670 
set_output_delay -clock  -reference_pin  -max 1.670 
set_output_delay -clock  -reference_pin  -min 0.670 
set_output_delay -clock  -reference_pin  -min 0.670 
set_output_delay -clock  -reference_pin  -min 0.670 
set_output_delay -clock  -reference_pin  -min 0.670 
set_output_delay -clock  -reference_pin  -min 0.670 
set_output_delay -clock  -reference_pin  -min 0.670 
set_output_delay -clock  -reference_pin  -min 0.670