Routing HPS I2C thru FPGA Not Working

Hey,

I seem to have similar problems running the hps_i2c0 as an master:

- I see the hps putting out the correct i2c-address on the bus and the slave reacts with an ack

- The TX_ABRT register says there was no ack and the communication stops

I use an ALT_IOBUFF to connect the pins from FPGA to hps as seen in the application note posted above.

mbp2014 have you found a solution yet?

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Hi

I followed Altera's guide AN706 (link below) to route HPS' I2C0 port through the FPGA on the Cyclone V Arrow SoCKit. I included the ALT_IOBUFF buffer as instructed by AN706 guide. But it's not working properly. We can send out I2C commands and we can see slave device sending ACK signal through an I2C analyzer. For some reason, the ACK is not reaching the HPS as we keep getting NACK from our code.

We are using Quartus 13.1 while AN706 mentions Quartus 14.0. Not sure if that's the issue. Has anyone successfully routed the HPS I2C port through the FPGA and got it working? Any suggestions/help would be appreciated.

www.altera.com/literature/an/an706.pdf (http://www.altera.com/literature/an/an706.pdf)

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Hey,

I seem to have the same problem here.

Have you found a solution to your problem yet?

I also see the ACK from the slave but the TX_ABRT register says there was no ack and stops.

QII 14.0 consist of the final timing model which is recommended for user to close timing while export HPS peripherals to FPGA region.

Anyway, the timing for i2c is quite slow thus I suppose it should not give much impact to your design.

A few thing I can think of here is:

1. Did you update your preloader after changing HPS setting in QSYS?

2. How did you connect your pin out to ALT_IOBUFF?

3. You stated you able to send out I2C commands, did you mean HPS send out or the slave did?

-Luis-