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GWang31's avatar
GWang31
Icon for New Contributor rankNew Contributor
7 years ago

Risk of one pin of 3.0 VCCIO bank connect to 5V logic?

Hello, I wrongly connect an I/O pin which is in 3.0V bank to 5V logic. I wonder will the damage(if happens) only affect to this specific pin or the whole FPGA? Will it help if I set this pin to hig...
Daixiwen's avatar
Daixiwen
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Is there a resistor limiting the current on that pin? Internally the FPGA has a clamping diode (if you didn't disable it) between the I/O pin and the VCCIO rail of that bank. If the diode is damaged due to the current, then the overvoltage could be transmitted to the VCCIO rail and this would damage more than just the I/O pin on the FPGA.