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Altera_Forum's avatar
Altera_Forum
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11 years ago

rise time measurement for refclk input

This is a board designer question - please help if you know the answer. Stratix V datasheet specifies max rise time for transceiver refclk as 250ps. The clock is differential It also specifie...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I does not have specific answer to your question but just to share my thought. Since the rise time is out from the datasheet specification, if you are not able to reduce the rise time, then you might need to perform thorough hardware tests to ensure the transceiver can function as your expectation.