Retrieve clock signal in transceiver RX (High Speed Differential I/O) for Arria 10

Hi,

Yes, this is not the actual scenario here. Commonly we would provide an external 125 Mhz clock source, whose purpose is to drive synchronously an ADC board at this sampling rate and the FPGA board. The clock source is on the ADC board, so I need to send it through SFP to the FPGA for it to be synchronous, I cannot generate it locally. We don't have yet the SFP interface for the ADC board, so prior to get it I wanted to validate this point by generating the clock with SFP TX and looping it back on RX. Indeed this is pointless here since I generate the clock directly on FPGA, but this is only for debug purpose. In the future the FPGA needs to be synchronous to this external clock through SFP, or at least we want to aim that - provided this is technically doable !

Regards