Restrict access to the top BDF in Quartus II 11.1sp2 on a cyclone II FPGA

Hi,

I'm currently working on a Cyclone II FPGA.

I used an existing and working project and add to it a part where a user can add customized function. The goal is to make little appication for beginners in VHDL.

My question is: is it possible to hide/lock parts of the top bdf where the behavior of the board is defined?

I'`m working with Quartus II 11.1sp2.

Thanks