Altera_Forum
Honored Contributor
12 years agoResitor Terminsion for LVDS ARRIA V
Hi all,
I'm designing a new board with LVDS connection: On the receiver side, I implemented (on my quartus design) a deserialiser at 85MHz for a 7 serialise factor. I read on the device handbook that I do not need any 100Ohm resistor : --- Quote Start --- 6-28 : The Arria V devices provide a 100 Ω, on-chip differential termination option on each differential receiver channel for LVDS standards. On-chip termination saves board space by eliminating the need to add external resistors on the board. You can enable on-chip termination in the Quartus II software Assignment Editor. All I/O pins and dedicated clock input pins support on-chip differential termination, RD OCT. --- Quote End --- Is it true for "simple" LVDS input (not transceiver input) ? Do I need to care about RZQ pin ? I don't understand what is it function ? (I just copy-paste the DDR3 schematic from ALTERA dev Board and they use it, and I know that it is linked with impedance input calibration....) On the transmitter side, do I need a network resistor (120-Ohm parallel and 170-Ohm in series) ? Thanks in advance.