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Altera_Forum's avatar
Altera_Forum
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16 years ago

reset input signal

Hi. I heard that the reset signal is better in active low. Is it true? If it is true may i know why? thanks
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Most control signals in Altera devices have a programmable inversion (usually LAB wide). Then high or low active async clear shouldn't matter, and should not need any LUT negation.

I'm not sure about Xilinx, but I'd be surprised if it's not the same.