Altera_ForumHonored Contributor12 years agoRegarding the parallel processing of matrix data We are trying to divide the complete data available, in row buffers of different size, and try implementing parallel processing, by calling the row buffers as individual separate entities. But, imple...Show More
Altera_ForumHonored Contributor12 years agoIts still not clear what you're doing. Is it a software solution or firmware on an FPGA?
Recent Discussions5AGXFB7K4F40C5GCyclone V SoC 5CSXC6 Series GXB Utilization and LimitationsQuartus and power domainMCD of AGFA006R16A2E3EPower-Down Sequence Requirements for the Agilex 7 F-Series(2x F-Tile) Devices