regarding my top file...

module NIOSII_DATA_FLASH(

iCLK_50, // 50 MHz

pll_c0_out,

pll_c1_out,

iKEY,

iSW,

oLEDG,

oLEDR,

oHEX0_D,

oHEX1_D,

oHEX2_D,

oHEX3_D,

oHEX4_D,

oHEX5_D,

oHEX6_D,

oHEX7_D,

LCD_D,

oLCD_ON,

oLCD_BLON,

oLCD_RW,

oLCD_EN,

oLCD_RS,

oUART_TXD,

iUART_RXD,

DRAM_DQ, // SDRAM Data bus 32 Bits

oDRAM0_A, // SDRAM0 Address bus 12 Bits

oDRAM1_A, // SDRAM1 Address bus 12 Bits

oDRAM0_LDQM0,

oDRAM1_LDQM0,

oDRAM0_UDQM1,

oDRAM1_UDQM1,

oDRAM0_WE_N,

oDRAM1_WE_N, // SDRAM1 Write Enable

oDRAM0_CAS_N, // SDRAM0 Column Address Strobe

oDRAM1_CAS_N, // SDRAM1 Column Address Strobe

oDRAM0_RAS_N, // SDRAM0 Row Address Strobe

oDRAM1_RAS_N, // SDRAM1 Row Address Strobe

oDRAM0_CS_N, // SDRAM0 Chip Select

oDRAM1_CS_N, // SDRAM1 Chip Select

oDRAM0_BA, // SDRAM0 Bank Address

oDRAM1_BA, // SDRAM1 Bank Address

oDRAM0_CLK, // SDRAM0 Clock

oDRAM1_CLK, // SDRAM0 Clock

oDRAM0_CKE, // SDRAM0 Clock Enable

oDRAM1_CKE, // SDRAM1 Clock Enable

FLASH_DQ, // FLASH Data bus 15 Bits (0 to 14)

FLASH_DQ15_AM1, // FLASH Data bus Bit 15 or Address A-1

oFLASH_A, // FLASH Address bus 26 Bits

oFLASH_WE_N, // FLASH Write Enable

oFLASH_RST_N, // FLASH Reset

oFLASH_WP_N, // FLASH Write Protect /Programming Acceleration

iFLASH_RY_N, // FLASH Ready/Busy output

oFLASH_BYTE_N, // FLASH Byte/Word Mode Configuration

oFLASH_OE_N, // FLASH Output Enable

oFLASH_CE_N, // FLASH Chip Enable

);

/////////////////////////////////////////////////////////////////////////////////

input iCLK_50;

output pll_c0_out;

output pll_c1_out;

input [3:0] iKEY;

input [17:0] iSW;

output [8:0] oLEDG;

output [17:0] oLEDR;

output [6:0] oHEX0_D;

output [6:0] oHEX1_D;

output [6:0] oHEX2_D;

output [6:0] oHEX3_D;

output [6:0] oHEX4_D;

output [6:0] oHEX5_D;

output [6:0] oHEX6_D;

output [6:0] oHEX7_D;

inout [7:0] LCD_D;

output oLCD_ON;

output oLCD_BLON;

output oLCD_RW;

output oLCD_EN;

output oLCD_RS;

output oUART_TXD;

input iUART_RXD;

inout [31:0] DRAM_DQ; // SDRAM Data bus 32 Bits

output [12:0] oDRAM0_A; // SDRAM0 Address bus 12 Bits

output [12:0] oDRAM1_A; // SDRAM1 Address bus 12 Bits

output oDRAM0_LDQM0; // SDRAM0 Low-byte Data Mask

output oDRAM1_LDQM0; // SDRAM1 Low-byte Data Mask

output oDRAM0_UDQM1; // SDRAM0 High-byte Data Mask

output oDRAM1_UDQM1; // SDRAM1 High-byte Data Mask

output oDRAM0_WE_N; // SDRAM0 Write Enable

output oDRAM1_WE_N; // SDRAM1 Write Enable

output oDRAM0_CAS_N; // SDRAM0 Column Address Strobe

output oDRAM1_CAS_N; // SDRAM1 Column Address Strobe

output oDRAM0_RAS_N; // SDRAM0 Row Address Strobe

output oDRAM1_RAS_N; // SDRAM1 Row Address Strobe

output oDRAM0_CS_N; // SDRAM0 Chip Select

output oDRAM1_CS_N; // SDRAM1 Chip Select

output [1:0] oDRAM0_BA; // SDRAM0 Bank Address

output [1:0] oDRAM1_BA; // SDRAM1 Bank Address

output oDRAM0_CLK; // SDRAM0 Clock

output oDRAM1_CLK; // SDRAM0 Clock

output oDRAM0_CKE; // SDRAM0 Clock Enable

output oDRAM1_CKE; // SDRAM1 Clock Enable

inout [14:0] FLASH_DQ; // FLASH Data bus 15 Bits (0 to 14)

inout FLASH_DQ15_AM1; // FLASH Data bus Bit 15 or Address A-1

output [21:0] oFLASH_A; // FLASH Address bus 22 Bits

output oFLASH_WE_N; // FLASH Write Enable

output oFLASH_RST_N; // FLASH Reset

output oFLASH_WP_N; // FLASH Write Protect /Programming Acceleration

input iFLASH_RY_N; // FLASH Ready/Busy output

output oFLASH_BYTE_N; // FLASH Byte/Word Mode Configuration

output oFLASH_OE_N; // FLASH Output Enable

output oFLASH_CE_N; // FLASH Chip Enable

/////////////////////////////////////////////////////////////////////////////////

assign oLCD_ON = 1'b1;

assign oLCD_BLON = 1'b1;

assign LCD_D = 8'hzz;

assign oFLASH_RST_N = 1'b1;

`define FLASH_WORD // use WORD mode of flash

`ifdef FLASH_WORD

wire FLASH_16BIT_IP_A0;

assign oFLASH_BYTE_N = 1'b1; // FLASH Word Mode Configuration

`else

assign oFLASH_BYTE_N = 1'b0; // FLASH Byte Mode Configuration

`endif

assign oFLASH_RST_N = 1'b1; // FLASH Reset

assign oFLASH_WP_N = 1'b1; // FLASH Write Protect /Programming Acceleration

assign oDRAM1_CLK = oDRAM0_CLK; //Fishy

wire CPU_CLK; //Fishy

/////////////////////////////////////////////////////////////////////////////////

NIOS2 the_NIOS2(

.clk (iCLK_50),

.pll_system (CPU_CLK),

.pll_memory (oDRAM0_CLK),

.reset_n (iKEY[0]),

.in_port_to_the_pio_button (iKEY),

.in_port_to_the_pio_switch (iSW),

.out_port_from_the_pio_LED_green (oLEDG),

.out_port_from_the_pio_LED_red (oLEDR),

.out_port_from_the_Hex0 (oHEX0_D),

.out_port_from_the_Hex1 (oHEX1_D),

.out_port_from_the_Hex2 (oHEX2_D),

.out_port_from_the_Hex3 (oHEX3_D),

.out_port_from_the_Hex4 (oHEX4_D),

.out_port_from_the_Hex5 (oHEX5_D),

.out_port_from_the_Hex6 (oHEX6_D),

.out_port_from_the_Hex7 (oHEX7_D),

.LCD_E_from_the_lcd (oLCD_EN),

.LCD_RS_from_the_lcd (oLCD_RS),

.LCD_RW_from_the_lcd (oLCD_RW),

.LCD_data_to_and_from_the_lcd (LCD_D),

.rxd_to_the_uart (iUART_RXD),

.txd_from_the_uart (oUART_TXD),

.zs_addr_from_the_sdram_1 (oDRAM0_A),

.zs_ba_from_the_sdram_1 (oDRAM0_BA),

.zs_cas_n_from_the_sdram_1 (oDRAM0_CAS_N),

.zs_cke_from_the_sdram_1 (oDRAM0_CKE),

.zs_cs_n_from_the_sdram_1 (oDRAM0_CS_N),

.zs_dq_to_and_from_the_sdram_1 (DRAM_DQ[15:0]),

.zs_dqm_from_the_sdram_1 ({oDRAM0_UDQM1,oDRAM0_LDQM0}),

.zs_ras_n_from_the_sdram_1 (oDRAM0_RAS_N),

.zs_we_n_from_the_sdram_1 (oDRAM0_WE_N),

.zs_addr_from_the_sdram_2 (oDRAM1_A),

.zs_ba_from_the_sdram_2 (oDRAM1_BA),

.zs_cas_n_from_the_sdram_2 (oDRAM1_CAS_N),

.zs_cke_from_the_sdram_2 (oDRAM1_CKE),

.zs_cs_n_from_the_sdram_2 (oDRAM1_CS_N),

.zs_dq_to_and_from_the_sdram_2 (DRAM_DQ[31:16]),

.zs_dqm_from_the_sdram_2 ({oDRAM1_UDQM1,oDRAM1_LDQM0}),

.zs_ras_n_from_the_sdram_2 (oDRAM1_RAS_N),

.zs_we_n_from_the_sdram_2 (oDRAM1_WE_N),

`ifdef FLASH_WORD

.tristate_bridge_address ({oFLASH_A[21:0],FLASH_16BIT_IP_A0}),

.tristate_bridge_data ({FLASH_DQ15_AM1,FLASH_DQ}),

`else

.tristate_bridge_address ({oFLASH_A[21:0],FLASH_DQ15_AM1}),

.tristate_bridge_data (FLASH_DQ[7:0]),

`endif

.read_n_to_the_cfi_flash (oFLASH_OE_N),

.select_n_to_the_cfi_flash (oFLASH_CE_N),

.write_n_to_the_cfi_flash (oFLASH_WE_N),

);

endmodule

can you guys find any error in writing....plus....can anyone tell me if my flash is working correctly???

also is my sdram working as i big 32mbx2 = 64mb memory???