Reconfigurate the FPGA image from the Nios II software

There is some further discussion of this in the NIOS forums. Altera provides a "Remote Upgrade" megacore that controls the config signal, so you don't need to add external connections or logic to do it. In Cyclone III, Altera even provides an SOPC wrapper.

Since this is almost always done with NIOS, I don't know why they didn't provide a SOPC wrapper in other families. They really ought to!

"Remote upgrade" is a slight misnomer - to me, that implies the process of getting a modified image into the EPCS, and not the mechanism that triggers a re-config.

In Stratix II, the megacore doesn't work properly if clocked at 166 MHz, but does at 33MHz... I don't know what the legal clock rate is.