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SDavi9's avatar
SDavi9
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

TSE and Optical Support

How do you implement the Optical interface within the TSE ? Is there any design e.g. that can be used with the Cyclone 10 Gx development board via the SFP+ plugs and OR the FMC connectors ?
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Yi's avatar
Yi
Icon for New Contributor rankNew Contributor
2 years ago

Hi,

TSE IP supports both MAC level MII/GMII/RGMII interface to PHY or serial interface/SGMII with PMA, so it may use with optical PHY as well, but just notice our TSE IP would have up to 1000Mbps ETH MAC.

Enclosed the block diagrams of TSE IP which may help:

1.5. High-Level Block Diagrams (intel.com)

  • SDavi9's avatar
    SDavi9
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    Dear Yi,

    We have a working design using the TSE implemented within a 5CEFA7U19I7N that communicates to an external PHY. I wanted use a copy of this design to implement it with an external optical Phy \ Transceiver. When I went into the TSE I could not find anywhere within the instantiated TSE parameters to configure it to be used with an external Optical transceiver ?

    Best regards

    Shmuel

    • Yi's avatar
      Yi
      Icon for New Contributor rankNew Contributor
      2 years ago

      Hi Shmuel,

      Wonder if you are referring to an optical module or external PHY outside the FPGA? actually it depends on the signal that communicates between the FPGA & external PHY, no specific parameter to select but need to select the correct ports and connect them to the target PHY.

      • SDavi9's avatar
        SDavi9
        Icon for Occasional Contributor rankOccasional Contributor
        2 years ago

        Dear Yi,

        We are looking into a design using an external (from FBGA) optical transceiver !

        Best regards

        Shmuel