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Altera_Forum
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15 years ago

clock mux with internally generated inputs

I generated a clock mux using altclkctrl megawizard. My input signals, both the clocks and select signal are generated internally. They are not coming from the clock pin or PLL. The quartus tool comp...
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Altera_Forum
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8 years ago

Originally Posted by Rysc

Sorry, but no. I think Altera has one somewhere but not sure. I'm sure there are some on the web somewhere. Might be a good post(maybe a new thread?). Is it a 2:1 mux or larger? The key is to disable one clock(by grounding the output after a falling edge) before enabling the other clock(release it's grouned output after a falling edge). But I just don't have a good piece of code.

Hi,

have a look to the attached document. I was posted by Kwalt in the year 2008.

It is more related to timing analysis, but gives also some hints for clock multiplexing.

Kind regards

GPK